ESA-ESTEC GSTP project Analog Silicon Compiler for Mixed-Signal ASICs Final Presentation - Introduction

Transcription

1 ESA-ESTEC GSTP project Analog Silicon Compiler for Mixed-Signal ASICs Final Presentation - Introduction Georges Gielen Katholieke Universiteit Leuven

2 Outline! Context! Project objectives! Project partners! Project overview! Overview Final Presentation Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 2

3 Need for mixed-signal ICs! analog is interface between DSP electronics and analog outer world " voice, audio, images " measuring and driving signals " transmitting signals Analog real world Digital Analog! high-performance applications " high speeds, low power... Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 3

4 The egg model [Paul Gray - UC Berkeley] consumer electronics analog telecommunications multimedia DSP automotive industrial applications military/space medical The more digital, the more analog and mixed-signal! Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 4

5 Is analog still important?! non-negligible % of system functionality is still analog! mixed analog-digital ICs is a multi-billion-$ industry 100% 80% 60% 40% % functionality analog functionality digital functionality 20% 0% Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 5

6 Example : ISDN interface ANALOG FRONT-END DIGITAL SIGNAL PROCESSORS SUBSCRIBER/EXCHANGE INTERFACE U-INTERFACE HYBRID TX AMPLIFIER A D A D TX FILTER RX FILTER ECHO CANCELLER AGC EQUALISER M U X SYNCHWORD 6kBd M U X 1Q 2B 1Q 2B SCRAMBLER ACTIVATION/ DEACTIVATION CONTROLLER DE- SCRAMBLER INTERFACE ADAPTATION 256 kbits/s 256 kbits/s 512kHz 8kHz S INTERFACE NT-MODE DOUTSXP DIN DCLK SRP DFR SXN SRN XTLI (CLS) 7.68MHz 34Ω 34Ω 5KΩ 5KΩ S0 INTERFACE WAKE-UP DETECTOR CLOCK RECOVERY Source : Alcatel Microelectronics Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 6

7 Example : ISDN interface PORTS µcore ANALOG BLOCKS SOFTWARE Source : Alcatel Microelectronics Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 7

8 SIA technology roadmap prediction of Gordon Moore: chip compute power *2 per 1,5 year Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 8

9 ! reduction of cost : What is driving integration? " technology used " number of components and passives! higher performance, lower power B De Muer ~ cm 2 ~ mm 2 Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 9

10 What about space?! integration reduces 3-D volume, weight! increased performance and lower power consumption! cheaper standard technologies Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 10

11 Need for analog CAD tools! analog is typically small fraction of chip area! but requires disproportionally large part of design effort and is often responsible for design errors! # analog is big problem for mixed-signal systems! # need analog CAD tools to solve this problem! Analog Analog Digital Digital AREA DESIGN TIME Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 11

12 Analog module generator [Gielen JCTheory 1995] AMGIE! covers complete design flow from spec to layout : " optimally tailors circuit to each application and process " increases analog design productivity " for frequently used cells e.g. opamps, filters... LAYLA Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 12

13 Outline! Context! Project objectives! Project partners! Project overview! Overview Final Presentation Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 13

14 Project objectives! extend Analog Module Generator (resulting from ASTP4 project) to meet the requirements for on-board space applications " mismatch/yield " better layout! develop, manufacture and test two ADC cells " high-speed ADC " low-power ADC for on-board PDFE! design, manufacture and demonstrate microcamera for on-board space applications " CMOS imager chips Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 14

15 Outline! Context! Project objectives! Project partners! Project overview! Overview Final Presentation Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 15

16 Project partners! prime contractor : Katholieke Universiteit Leuven! subcontractor : IMEC " subcontractor : FillFactory Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 16

17 Outline! Context! Project objectives! Project partners! Project overview! Overview Final Presentation Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 17

18 Project overview! duration : October March 2001! phase I and II MAU! project activities : " WP : consolidation and extension of the AMG (K.U.Leuven) " WP : development of high-speed ADC (K.U.Leuven) " WP2600, : development of PDFE, including lowpower ADC (IMEC) " WP : development of microcamera (IMEC - FillFactory) " WP : project management (K.U.Leuven) Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 18

19 Outline! Context! Project objectives! Project partners! Project overview! Overview Final Presentation Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 19

20 Final Presentation Overview! Geert Van der Plas (K.U.Leuven) : Analog module generator software (AMGIE/Mondriaan)! Jan Vandenbussche (K.U.Leuven) : Irradiation of CSA-PSA High-speed analog-to-digital converter! Jan Wouters (IMEC) : Particle detector front-end (PDFE)! lunch! Werner Ogiers (FillFactory) : Integrated radiation-tolerant imaging systems (IRIS1, IRIS2) Final presentation ESA-ESTEC 7/3/2001 Georges Gielen 20