EX 5 DIGITAL ELECTRONICS (GROUP 1BT4) G

Size: px

Start display at page:

Download "EX 5 DIGITAL ELECTRONICS (GROUP 1BT4) G"

Sherman Flowers
5 years ago
Views:

1 EX 5 IGITAL ELECTRONICS (GROUP BT4) G Afer compleing he ask and sudying Unis 2., 2.2, 2.3 and 2.4, you will be able o (ick all ha apply): Explain he concep of memory in digial sysems and why we alk abou sequenial sysems for inroducing he ime variable. Wha is he meaning of soring or saving a bi of informaion? escribe he characerisics of basic asynchronous bi memory cells or laches SR and is variaions, JK and T wih enable E inpu using a funcion able Plo a imingdiagram for demonsraing he mode of operaion of basic lach cells escribe he lach cell using he sae diagram ool esign laches and simple sequenial sysems using he direc mehod based on he echniques in Chaper esign imers and clocks based on he 555 inegraed circui Explain using imediagrams he noion of synchroniciy in flipflop cells esign flipflops and oher simple synchronous sysems using he canonical mehod Produce a wrien soluion for he exercise using he insrucions from: hp://epsc.upc.edu/projeces/ed/unias/unia /Crieris_Correccio_Exercici.pdf Work cooperaively in a eam of 3 members using he mehod described in: hp://epsc.upc.edu/projeces/ed/problemes/meode_resolucio_cooperaiva_recomana.pdf Wrie down he mos significan quesions you have had while or afer compleing he ask: STATEMENT: My signaure below indicaes ha I have () made equiable conribuion o EX 5 as a member of he group, (2) read and fully agree wih he conens (i.e., resuls, conclusions, analyses, simulaions) of his documen, and (3) acknowledged by name anyone ouside his group who assised his learning eam or any individual member in he compleion of his documen. Today s dae: Acive members Roles: (reporer, simulaor, ec.) () (2) (3) Acknowledgemen of individual(s) who assised his group in compleing his documen: () (2) Sudy ime (in hours) Group work Sessions TGA, TGB Sessions TGC Individual Suden Suden 2 Suden 3

2 Which is he easies way o conrol a simple moor? esign a simple asynchronous sequenial sysem by direc mehod: an ON/OFF moor conrol sysem as shown in Fig.. Verify your design in ProeusVSM downloading he projec file from he E web page. RUN MOTOR CONTROL SYSTEM 4 N448 RL 4V B 20V STOP RUN STOP Z R2 k BC547 R 2k CMOTOR 20V GN ONOFFCONTROL Fig. Schemaic of he conrol sysem o drive a high power moor load a) Specificaions: funcion able; sae diagram; iming diagram. b) General archiecure using direc mehod and design of he combinaional sysem using Chaper mehods: a. Using he mehod of decoders b. Using he mehod of muliplexers c. Using a canonical srucure NOTANOR d. Using NOR c) ProeusVSM schemaic capure and verificaion Limiing he number of he moor s ON/OFF cycles using a imer 2 Produce a imer o connec o he previous conrol sysem using he classic 555 inegraed circui. Is mission will be o preven acivaing he moor (RUN) before ha a ime of 2 s has elapsed. Therefore, only 4 cycles of RUN/STOP will be permied per minue. RA 00MEG Run Sop Z + Funcion 0 0 Z o nohing 0 0 Sop (OFF) 0 Run (ON) Z o nohing a. Following he explanaions in he didacical Uni 2.4, analyse he circui shown in Fig. 2. educe he waveforms and he design equaion which gives T 0 = f(r, C) 555 Timer delay = K Rx Cx CHIP 555 consan K =. R2 0k R 4 R 8 U 3 7 C? + C 5 CV 2 TR GN TH 6 TRIGGER 555 b. Connec he imer module o he moor conrol sysem using logic circuiry Fig. 2 A 555based imer 2

3 Conrolling he moor by means of a onebuon remoe conrol 3 esign he block diagram of an infrared emierreceiver which has o be able o inerface wih he previously designed moor acivaion sysem by means of a single pushbuon. Use your imaginaion, ask for informaion, surf he web, and discuss wih your colleagues. Adding securiy o he sysem 4 Add or redesign he sysem so ha if he user has no compleed he operaion of insering coins afer 5 s, he machine reses iself and give back he money. Cells for soring bis...he basic brick of any sequenial sysem and everyhing in elecronics! Prin and sudy he concep maps of he didacical unis: 2.2, bi asynchronous memory cells, laches; and 2.3, synchronous memory cells, flipflops; Wrie down your quesions in a shee of paper and ry o answer hem wih your colleagues and in classroom. educe he oupu for he laches and flipflops in Fig. 3 and Fig. 4 when he exciaion waveforms are applied a he inpus. E Lach E _L (use he ransparen ype lach funcion able) S R S Lach R RS _L (use he RS lach funcion able) Fig. 3 ype (daa) and RS laches (S = 0) C S JKFF (use he ype flipflop funcion able) _L C S J S J JKFF K K _L C (use he JK flipflop funcion able) (C = 0) Fig. 4 JK and flipflops 3

4 5 esign an inernal circui using he direc mehod for all four bi memory cells and demonsrae heir funcioning by a simulaion in Proeus. a. Funcion able and symbol b. Sae diagram and inernal archiecure for direc mehod c. Truh able for he design of he combinaional block d. Circui capure in Proeus and simulaion for verificaion 6 esign an inernal circui using he canonical mehod for all he four bi memory cells if an RS flipflop is used as he sae regiser. emonsrae heir funcioning by a simulaion in Proeus. a. Specs: funcion able, symbol, sae diagram, ime diagram b. Canonical inernal archiecure using RS flipflop. Transforming a RS lach wih enable inpu o obain a RS flipflop c. Code he saes. In his case, rivially sae rese ( = 0), and se ( = ) d. raw he sae regiser e. esign he CS2 f. esign he CS using ransiion able and design able for he RS flipflop g. And capure your schemaic and demonsrae he way i works 7 esign an 8bi wide synchronous ype flipflop wih enable using JK flipflops as he sae regiser for each bi cell. Find informaion abou a commercial chip like he one designed (like he one shown in Fig. 5) E 74LS377 Fig. 5 Example of a commercial chip ype flipflop wih enable 8 And finally, use he 555 o build a recangular wave of 5 V and 00 KHz o be used as he clock synchronizaion signal for flipflops. Use he Proeus oscilloscope o demonsrae your design. Fig. 6 Example of a square wave signal 4

Synchronizing exernal inpus for a vending machine.. Elecrical schemaic or hardware The coffee vending machine (Fig. 7) mus accep 0.5, and 2 coins. The coffee coss.

..2 Coin selecor and inpu synchronisaion using a FSM Clicking keys is an asynchronous aciviy produced a human speed, milliseconds or even seconds or whaever period of ime by which you have he key

5 Synchronizing exernal inpus for a vending machine.. Elecrical schemaic or hardware The coffee vending machine (Fig. 7) mus accep 0.5, and 2 coins. The coffee coss.5, so you can inser coins in any order and he machine will respond by delivering he produc and he change when necessary. The change consiss of 0.5 coins only, hus, if 3 is inroduced as + 2 coins, he machine has o generae up o 3 oupu pulses o give back he.5 change in 0.5 coins...2 Coin selecor and inpu synchronisaion using a FSM Clicking keys is an asynchronous aciviy produced a human speed, milliseconds or even seconds or whaever period of ime by which you have he key pressed by he physical acion of your hand. However, compuers work a higher speeds, normally in nanoseconds. So, he problem is how o inerface a human acion like his one of pressing keys o a compuer conrolled by a synchronous signal. Furhermore, mechanical keys, pushbuons or swiches can produce conac bounces which are unsable and random for some ime and mus be removed in order he digial sysem operae correcly. Le us o design a synchronous 4key keyboard encoder using he conceps of finie sae machines (FSM) o produce clean digial oupus when any key is hi. A) Find informaion in books or hrough he Inerne (for insance in Uni 2.3 or in his SE example) relaed o he problem of mechanical conac bouncing in pushbuons, and explain he phenomena. B) esign he inernal circuiry of he coin encoder and synchronizer SS as a FSM prepared o produce he following funcion able (SS2 will be for he nex EX6): coin ype (CT) coin presen (CP) 00 0 none 0 0, ,5 2 R 00k SS Coin0_5 Coin Coin2 CT CT0 CP 0 SS2 CT CT0 CP CF CM Coffee 0 0 Change rese C_L C_L COIN_SELECTOR VENING FSM 00Hz Fig. 7 Vending machine schemaic srucured ino wo blocks: a coin encoder and synchroniser, and he FSM o produce he desired oupus: coffee and coin change hp://epsc.upc.edu/projeces/sed/grups_classe/0809_/2at4/08092at4.hm#ebouncing 5

6 IGITAL ELECTRONICS G Working plan 2 for solving he exercise EX 5 Explain succincly how he cooperaive group has carried ou he exercise: i.e., which was your working plan; in which way did you divide he ask fairly so ha more or less all of you were doing a similar amoun of work; how did you learn each oher s maerials; wha was worked ou in class ime (sessions A and B) and wha was resolved in sessions C; and so on... wrie down also your impressions or opinions on he subjec and how your group work is going 3... Acive members signaures 2 This documen, filled before delivering he exercise, will be included in he group learning porfolio 3 Check similar documens in hp://epsc.upc.edu/projeces/ed/unias/e_0506 Auoavaluacio_Grup_Base.pdf, and hp://epsc.upc.edu/projeces/ed/unias/que_va_malamen_al_grup.pdf 6

-To become familiar with the input/output characteristics of several types of standard flip-flop devices and the conversion among them.

-To become familiar with the input/output characteristics of several types of standard flip-flop devices and the conversion among them. Experimen 6 Sequenial Circuis PART A: FLIP FLOPS Objecive -To become familiar wih he inpu/oupu characerisics of several ypes of sandard flip-flop devices and he conversion among hem. References Donald